1. Field of the Invention
This invention generally relates to electronic circuits adapted for converting one form of an intelligence signal into another form, and more particularly to an inherently monotonic digital-to-analog converter.
2. Prior Art
In the early development phases of electronic circuitry, converters (such as a digital-to-analog converter) were built in large rack mounted units, first using vacuum tubes and later discrete transistors. As components became smaller and smaller, it was possible to put an entire converter on a printed circuit board. Later it was possible to place the converter in a smaller module surrounded by a potting compound. As integrated circuits became more powerful, converters were made with multiple integrated circuit chips including laser-trimmed thin-film resistors combined in a hybrid assembly. Such a prior art device is described in greater detail in an article entitled "An Integrated Circuit 12-Bit D/A Converter" by R. B. Craven, which article was published in the ISSCC Digest of Technical Papers at pages 40-41 in February, 1975.
More recently, monolithic converters have been fabricated with the use of thin-film resistors that are laser trimmed. For purposes of this description, "monolithic" refers to a single structure on a single semiconductor chip. Such a prior art device is described in greater detail in an article entitled "A High-Speed 12 Bit Monolithic D/A Converter" by R. W. Webb, which as published in the ISSCC Digest of Technical Papers at pages 142-143 in February, 1978.
With reference to FIG. 1, a schematic diagram of a typical prior art binary weighted R-2R ladder network digital-to-analog converter (DAC) is illustrated. Briefly, the output of an amplifier A10 is coupled to base terminals of a series of parallel-connected transistors (Q1, Q2, Q3, Q4 . . . Qn-1, Qn) for providing the appropriate bias voltage. The emitter terminals of each of these transistors is coupled one side of a resistor 2R, and the second sides of these resistors are coupled together through additional resistors R. Thus, the name "R-2R". The collector terminal of these transistors are coupled to operating terminals of switches operative in response to the state of the binary inputs. For example, a switch will be set into one position for a digital one and into another position for a digital zero. One terminal of each of the switches is coupled to ground potential, and the second terminal is coupled to an output line 24 also referred to as I.sub.out.
The ladder includes resistor "rungs" having a value of 2R and extensions having a value of R. This combination of rungs and extensions serves to divide the current in each rung by 50 percent of the preceding rung. For example, if the first three transistors are coupled to the I.sub.out output line 24 the current sourced by the first transistor will be twice the current sourced by the second transistor which in turn will be twice the current sourced by the third transistor and so on. Thus, if the first transistor sources 2 milliamps of current, the second transistor will source 1 milliamp, the third 0.5 milliamp, and so forth.
The prior art converter includes twelve binary-weighted current sources which are used in all possible binary combinations to produce 4,096 analog output levels. The main advantage of the R-2R structure is that it uses a minimum number of components that must match and track well over temperature. The most critical resistor in the circuit is the most significant bit (MBS) resistor coupled to the emitter terminal of Q2. If the full-scale current of this converter is 4 milliamps, then the MSB will be 2 milliamps and each succeeding bit will be divided by 2 all the way down to the least significant bit (LSB) transistor, which is one microamp. At a major carry transition point, the eleven least significant bits will be turned on to produce an output current of 1.999 milliamps for an input code of 011111111111. When the input code is incremented 1 count, becoming 100000000000, the lower order current sources turn off, and the MSB current source turns on to yield an output current of 2 milliamps. If this source has an error of more than -1 microamps, the converter will be nonmonotonic. This corresponds to a resistor tolerance of 0.05 percent, which must be maintained over the entire operating temperature range. Even when the resistors match well, laser trimming can alter their tracking characteristics and affect yield over temperature. Even though it is possible to match diffused transistors to within plus or minus 0.05 percent, they are not really practical with the R-2R structure due to their high temperature coefficient, piezoresistance, and voltage coefficient.
One design approach that provides monotonicity without requiring high linearity is the MOS switch-resistor string. For purposes of this description, "monotonic" refers to a continuous function wherein the output increases for each increase in the digital input binary number. This circuit is actually a full complement to a current switched R-2R DAC structure since it is slower, has a voltage output, and if implemented at the twelve-bit level would use 4,096 low tolerance resistors rather than a minimum number of high tolerance resistors as in the R-2R structure. Such a prior art converter is described in greater detail in an article entitled "A Single Chip 8-Bit A/D Converter" by A. R. Hamade and E. Campbell, which was published in ISSCC Digest of Technical Papers at page 154 in February, 1976.
Another design approach that provides monotonicity with a non-linear function is described in a paper entitled "A Monolithic Companding D/A Converter." This paper was presented by the inventor hereof at the Telecommunications Circuit Techniques Session of the IEEE Solid-State Circuits Conference on Feb. 16, 1977, and is published at page 58 of the proceedings of this conference.